1. Field of the Invention
The present invention relates to a memory apparatus, a memory control method, and a program. More particularly, the invention relates to a memory apparatus having a nonvolatile memory such as a flash memory, as well as to a memory control method and a program for use with the memory apparatus.
2. Description of the Related Art
There exist varieties of memory apparatuses each containing a flash memory and serving as an external storage device for use with such devices as personal computers, digital still cameras, digital video cameras, and audio recorders. The flash memory is a memory that allows data to be randomly written thereto and read therefrom in clusters. Data is deleted from the flash memory not randomly but in units of a block.
The storage cells in the flash memory deteriorate through repeated data updates. For that reason, the number of update operations on the flash memory is limited. That is, access concentrated on the same clusters is averted so as to prolong the life of the flash memory. When data located at a logical address associated with a given physical address is to be updated, the update data is written not to the same physical block but to another physical block of a newly deleted state (i.e. free block).
The physical address to which the logical address of interest is allocated before a data update is made different from the physical address to which the logical address is allocated after the update. This feature is implemented by the flash memory using an internally stored address translation table that denotes the relations of correspondence between logical and physical addresses. When the memory apparatus is attached to a host device, the address translation table is read from the flash memory, loaded into a working memory of the host device or of the memory apparatus, and updated therein.
In an ordinary memory apparatus, a data update of even a few sectors involves rewriting data in a whole physical block. The access to the block takes time and promotes deterioration of the storage cells therein. In order to minimize the disadvantage, each block in the flash memory is divided into a header area and a data area. The starting address and record length of a data record to be written to a data area are written to the corresponding header area, and the data record in the data area is furnished with a link information area and a flag area. Data is thus written and updated in units of a data record. When the current block becomes exhausted, an effective data record is retrieved and transferred to a free block and the block from which the record was retrieved is deleted. This technique is disclosed illustratively in Japanese Patent Laid-open No. Hei 11-73363 (called the Patent Document 1 hereunder).